Senior/ IC Design Engineer (Physical Design)

About this role

Job Description Perform RTL-to-GDS physical implementation for ASIC IP/subsystem/SoCdesigns using industry-leading EDA tools and AI-assisted methodologies, Develop and execute synthesis, Design-for-Test (DFT), and timing closure strategies, including DRC/LVS, static timing analysis (STA), scan/DFT v

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• Engineering
• Sciences / Laboratory / R&D
• Perl
• Physical Verification
• Logic Synthesis
• Design

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