Senior AI Engineer – Design Automation

About this role

Description: Apply advanced AI techniques to accelerate the design of faster, smaller, and more power-efficient chips. Key Responsibilities: - Harness Large Language Models (LLMs) to automatically generate, refine, and debug RTL code in Verilog/SystemVerilog. - Apply Graph Neural Networks (GNNs) to

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• Engineering
• Information Technology
• Machine Learning
• Static Timing Analysis
• RTL Coding
• Development Tools